| Specification |
| Output frequency |
1.000~400MHz |
| Mode |
TTL. CMOS COMPATIBLE |
| Frequency stability |
±50ppm, ±100ppm |
| Operating temperature range |
0~70℃ |
| Storage temperature range |
-55~125℃ |
| Input voltage |
5.0V DC -+ 0.5V or 3.3V DC -+ 0.3V |
| Input current |
10 mA MAX. (1.25~10MHz) 25 mA MAX. (10~26MHz) 35 mA MAX. (26~50MHz) 50 mA MAX. (50 MHz) |
| Wave form symmetry |
40~60%, 45~55% ( TTL:1.4V LEVEL) CMOS:50%VDD |
| Rise and fall time |
TTL : 6nS MAX. (0.4V to 2.4VDC) CMOS: 10nS MAX. (0.5V to 4.5VDC) |
| Low level output voltage |
TTL : 0.4V MAX. CMOS: 0.5V MAX. |
| High level output vollage |
TTL : 2.4V MIN. CMOS: Vdd-0.5V MIN. |
| Output load |
TTL : 1~10 TTL GATES. CMOS: 15pF (50pF MAX) |
| Enable/Disable input voltage |
| (#1) NC |
(#1) "L" : 0.8V MAX. "H" : 2.2V MIN. |
1.25~30MHz "L": 0.4V MAX. "H": 2.4V MIN. |
30~70MHz "L": 1.0V MAX. "H": 4.0V MIN. | |
| Output Function |
| (#1)NC |
|
Tri-state |
| L/H(#1) |
output(#8) |
| "H" or OPEN |
Fo |
| "L" |
Disable | |
|
Tri-state |
| L/H(#1) |
output(#5) |
| "H" or OPEN |
Fo |
| "L" |
Disable | | |